ONLINE LAB - 4

Name of the experiment: Characterization of JFET

Objective

The objective of this experiment is to study the JFET behavior and its I-V characteristics from a remote place (online).

Concept of Online Education

Online Education (OE) refers to a mode of education and a system where the interacting learner and the teacher are separated by space where the interaction can be done through high speed internet. It is an alternative method of instructional process to the traditional or conventional method. It enables a large segment of the learners with necessary aptitude to learn more knowledge and professional competence. Since OE is a form if instruction, which is capable of catering for large number of students, it is impossible to deliver the instruction and teaching without the help of a PC and an internet connection. The easily available internet connectivity is helping to distribute the content and teach the same to the distance learners. This is an effective media and has been extensively used for educational purposes to spread literacy or to give formal and non-formal education all over the world. In the present decade, the online media is dominating in distance education in the developed and developing countries.

In India, continuous efforts are being made to improve the quality and quantity of distance education and several educational commissions have examined and made recommendations for bringing about the required innovations to meet the needs of the distance education system. Moreover, several research studies have indicated that the effective use of new instructional strategies through communication and information technologies, which provide individualized instructions like Learning Module, Programmed Learning Material (PLM) and Computer Based Instructional (CBI) materials. These methods together with its allied communication technologies reach a large number of learners and also help in improving the quality of teaching-learning process in distance education. Now, with the introduction of digital technologies like telecommunication, Interactive television (I-TV) and Virtual conferences (Video conferencing, teleconferencing, audio conferencing and computer conferencing), the virtual learning was established in distance education for teaching, learning and evaluation. In that regard, recently developed online experimentation is playing an important role for online education in India.

Concept of Online Labs

Advancing technology has opened many doors in education. The next step in this direction is interactivity at teaching. Student is able to, not only to see what is involved, but he or she is able to learn from hands on experience. Using computers can be a very effective way of accomplishing this. Students are more motivated and can learn more effectively if they have the opportunity to conduct experiments. Experiments allow a student to compare reality with simulations, collaborate with each other, and give them opportunity to follow their curiosity. Experiments allow a student to compare reality with simulations, collaborate with each other, and give them opportunity to follow their curiosity. Unfortunately, many engineering courses do not include lab component because of significant expense and space considerations. In response to this, I-Lab created remote web accessible laboratories are providing a new framework of science and engineering courses. Remote laboratories allow for much more efficient use of laboratory equipment and give students the opportunity to conduct experiments from the comfort of his home, with an Internet accessible browser. These online Internet accessible labs are important in several learning situations. The first of these is the distance learning scenario. In this situation, learners execute a laboratory oriented course or exercise from their homes or places of employment. Individual learners are remote from each other so that collaboration is distributed. There are currently an increasingly large number of efforts to provide the online analog of the university classroom in various parts of the world. However, there are comparatively few efforts to provide the online analog of the university laboratory, as lectures are much simpler to implement in the Internet environment. However, laboratory learning is a key part of a well designed curriculum. As the number of distance learners and distance learning programs increase, the demand for online laboratory access will also increase. This could for example, also make them available to other national community colleges or partnering Universities and colleges all around the world. So, laboratory based learning experiences that traditionally have been possible only at universities with abundant funds for research are now accessible to many. Third scenario of application is integration of reality into live lectures and seminars. In this situation, teachers present to classroom audience a live (but remote) experiment or demonstration controlled by the instructor. In this scenario, the lab is brought online to the classroom. Economic, space, and cost issues are extremely important and must be considered in setting-up any distance as well as conventional learning environment. Online Laboratories hold promise of being up to three orders of magnitude cheaper to setup than conventional laboratories, requiring less space to run the experiments and being accessible to much larger audience and utilized round the clock.

Typical online Internet accessible laboratory consists of:

v      Lab device, instrument or pilot plant equipment for tele-presence showing the lab to remote users

v      Teleconferencing equipment or at least built-in chatting capabilities for collaboration among students  and instructor

v      Control software allowing users to perform experiments, program lab devices and/or run pilot plant.

Introduction to JFET

The junction gate field-effect transistor (JFET) is the simplest type of field effect transistor. A piece of n-type semiconductor material (channel) is sandwiched between two smaller pieces of p-type (gates). The ends of the channel are designated as drain (D) and the source (S), and the two pieces of p-type material are connected together and their terminal is named the gate (G). This is illustrated in the Figure 1.

N-channel JFET

With the gate left unconnected, and a drain-source voltage (V_D) applied (positive at the drain, negative at the source), a drain current (I_D) flows.  When a gate-source voltage (V_GS) is applied with the gate negative with respect to the source, the gate channel p-n junctions are reverse biased. The channel is more lightly doped than the gate material, so the depletion regions penetrate deep into the channel. Because the depletion regions are regions depleted of charge carriers, they behave as insulators. So, the channel is narrowed, its resistance increased, and I_D is reduced. When the negative gate-source bias voltage is ­­­­­­­­­­­­­­­further increased, the depletion regions meet at the centre of the channel, and I_D is cut-off.

An AC signal applied to the gate causes the reverse gate-source voltage to increase as the instantaneous level of the signal goes negative, and to decrease when the signal is positive going. This causes the gate channel depletion regions to successfully widen and decrease. When the signal goes negative, the depletion widens, the channel resistance is increased, and the drain current decreases. As the signal goes positive, the depletion regions recede, the channel resistance is increased, and the drain current increases. It is seen that the FET gate-source voltage controls the drain current. The gate channel p-n junctions are reverse bias, so the gate current is normally extremely low: much lower than the base current for a bipolar transistor.

P-channel JFET

In a p-channel JFET, the channel is p-type semiconductor, and the gates are n-type. The drain-source voltage (V_D) is applied negative to the drain, positive to the source, and the drain current (flows in the conventional direction from source to drain). To reverse bias the gate-channel junctions, the n-type gate regions must be made positive with respect to p-type channel. So, the bias voltage is applied positive to the gate terminals, negative to the source.

A positive going signal at the gate terminal of a p-channel JFET increases in the gate-channel junction reverse bias causing the depletion regions to penetrate further into the channel. This increases the channel resistance and decreases the drain current. Conversely, a negative going signal narrows the depletion regions, reduces the channel resistance, and increases the drain current.­­­­­­­­­­­­­

Drain characteristics with V_G=0: Consider V_GS =0. V_DS is increased in convenient steps from zero, and I_D is measured at each V_DS level. It is seen that, when V_DS = 0, I_D = 0. There is no channel voltage drop, so the voltage between gate and all points on the channel is zero, and there is no depletion region penetration. When V_DS is increased by a small amount (less than 1 volt), small drain current flows producing some voltage drop along the channel. This results in some depletion penetration of the channel, but it is so small that it has no significant effect on the channel resistance. With further small increases in V_DS, the drain current increase is approximately linear, and the channel behaves as an almost constant value resistance. The channel behaves to continue as fixed value resistance until the voltage drops along it becomes large enough to produce considerable depletion region penetration. At this stage, the channel resistance begins to be effected by the depletion regions. Further increases in V_DS produce smaller I_D increases, as shown by curved part of the characteristic. The increased I_D levels, in turn, cause more depletion region penetration and greater channel resistance. Eventually, a saturation level of I_D is reached where further V_DS increase seems to have no effect on I_D.

At the point on the characteristic where I_D levels-off, the drain current is referred to as the drain-source saturation current (I_DSS). The shape of the depletion regions in the channel at the I_DSS level is such that they appear to pinch-off the channel. So, the drain source voltage at this point is termed the pinch-off voltage (V_P). The region of the characteristic where I_D is constant is called pinch-off region. The channel mostly behaves like a resistance between V_DS = 0 and V_DS = V_P, so this part of the characteristic is known as channel ohmic region. If V_DS is continuously increased, a voltage is reached at which the reverse biased gate-channel junction breakdown. When this occurs, I_D increases rapidly and the device might be destroyed. The pinch-off region of the characteristic is the normal operating region of the FET.

Transfer characteristics

The transfer characteristics of an n-channel JFET is a plot of I_D vs. V_GS. The gate-source voltage of a FET controls the level of the drain current, so, the transfer characteristics show how I_D is controlled by V_GS. The transfer characteristics extends from I_D=I_DSS at V_GS = 0 to I_D = 0 at V_GS = V_p. Here, the drain-source voltage is maintained constant. V_GS is adjusted in convenient step, and the corresponding levels of V_GS and I_D are recorded. As -V_GS is increased, I_D is progressively reduced from I_DSS at V_GS = 0 to I_D = 0 at V_GS =-V_p. The transfer characteristic of a JFET can be derived from the drain characteristics.

P-channel JFET characteristics

The figure shows the circuit for obtaining the characteristics of a p-channel JFET. The drain terminal is negative with respect to the source, and the gate terminal is positive with respect to the source. V_GS is maintained constant at the desired level. –V_DS is increased in steps from 0, and the I_D levels are noted at each step.

                                        Figure 5: - p-JFET transfer and drain characteristics

                                                   Figure 6: - Circuit for determining characteristic of p-JFET

The locus of all the pinch-off points, labeled the pinch-off line, where each point represent the difference between V_SAT and V_G. This difference is equal to V_P. The region of the characteristic curve where V_D > V_SAT is known as saturation region. The region to the left of the pinch-off line and where V_D < V_SAT is the linear region, although only for small V_D is the variation of I_D with V_D being linear. Cutoff represents the condition corresponding to V_SAT = 0 and hence zero I_D. When the transistor is to be used as an amplifier, the operating point is selected to be in the saturation region. The principal use of a JFET in linear region is as a variable resistor and, in particular, in the region very near the origin.

Software(s) and Hardware(s) required

a.       PC with internet connectivity (preferably high-speed)

b.      Teamviewer software for remote user (free downloadable)

Procedure

Step 1 – Read the manual of your experiment from our Homepage link

Step 2 –  Register and Login, remember your “User ID” and “Password”. (Registration is required only for one time)

Step 3 – Read the procedure for doing the experiment and Click on the button to proceed

Step 4 -  Now, “log in” to connect the remote Hardware Setup (at Indian Institute of Technology, Kharagpur, India)

Step 5 - Click on the experiment of your choice (from left column)

Step 6 – Now answer the preliminary quizzes to be eligible for doing the experiment

Step 7 - click on “Book the experiment” to book the particular slot for your experiment (time and date)

Step 8 – Click on “Run Experiment” during your time and slot

 Step 9 – Give the “input parameters” as per requirement of the experiment and click on “enter”

 Step 10 – The output curve will appear on your screen gradually and automatically. The  numerical output data will be shown simultaneously.

 Step 11 – Take the graph and data for showing “Result” using other software

Step 12 - Analyze the data and graph.

Step 13 - To Log out, click on the    and close the window.

Step 14 - Now type www.vit.ac.in/onlinelab to go the home page again.

Step 15 - You are ready for the next experiment.

Results

The following diagram shows the Transfer characteristics and I-V characteristics of a JFET along with its regions of operation.

Conclusion

The study of JFET envisages its use as an amplifier (common source configuration) in saturation region, as a voltage controlled resister in linear region and as an analog switch using P-channel JFET. The behavior of P-channel and N-channel JFET is clearly differentiated by their I-V and transfer characteristics graphs.    

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